The invention relates to manufacture of integrated circuits. More particularly, the invention relates to etching deep trenches in semiconductor wafers.
As structures fabricated upon semiconductor wafers are reduced in size, etching of deep trenches for applications such as logic devices and dynamic random access memories (DRAM's) has become a serious challenge. Such deep trenches are typically formed by a photolithographic process requiring a plasma etch. The substrate is typically made of a semiconducting material such as silicon. The trench is then filled with a material, such as polysilicon to form what is known as a trench capacitor. Such trench capacitors are used, for example, for storing charge in a memory cell of a DRAM. In other applications, such as deep trench isolation, the trench may be filled with a dielectric.
FIG. 1 shows a partially-formed trench capacitor. The capacitor 100 comprises a trench 102 formed in a silicon substrate 104. The trench 102 is filled with a polysilicon material 106. The trench 102 has an upper wall 108 and a lower wall 110. The upper wall 108 forms a taper angle .alpha. with respect to a horizontal 111. In DRAM applications the lower wall 110 and bottom 112 are typically coated with a thin (approximately 200 .ANG.) layer of dielectric known as a node 118. The upper wall is typically coated with a somewhat thicker (about 300 .ANG.) layer of dielectric often called a collar 120. The node 118 and collar 120 are both typically made of a silicon oxide Si.sub.x O.sub.y deposited by methods known in the art. The lower wall 110 forms a taper angle .beta. with respect to a horizontal line 113. There are often different requirements for the taper angles .alpha. and .beta.. For example, when filling the trench 102 with the polysilicon material, a seam tends to form near the top of the trench. It is typical for DRAM manufacturers to require that the angle .alpha. generally be made less than 89.degree. to prevent seam formation during trench fill. To maximize the surface area of the capacitor, DRAM manufacturers typically require that the angle .beta. generally be made as large as possible. Thus, the angle .beta. is generally larger (i.e., more vertical) than the angle .alpha.. As a result a width b of the trench 102 is approximately the same at a bottom 112 as a width a at an interface 114 between the upper and lower walls. However, a width c of the trench at a top 116 is typically larger than widths a or b. This is particularly important when a depth d of the trench is large compared to width a or b.
One known method for forming a trench such as trench 102 depicted in FIG. 1 is to etch the trench with a plasma containing hydrogen bromide (HBr) and oxygen (O.sub.2) diluted with helium (He) in a magnetically enhanced reactive ion etching (MERIE) chamber. This process uses a transverse magnetic field to enhance the electron concentration in a capacitively coupled plasma. Such a plasma has a pressure of approximately 100 to 200 millitorr and an ion density on the order of 10.sup.9 ions/cm.sup.3. The O.sub.2, together with Si-containing etch byproducts such as silicon oxybromide (Si.sub.x O.sub.y Br.sub.z) forms a passivation layer on the walls 108 and 110 of the trench 102. The deposition of this layer determines the trench profile (i.e., the angles .alpha. and .beta.). In the HBr/O.sub.2 /He process described above, the deposition of the passivation layer is controlled by varying the ratio of HBr to O.sub.2. Thus, the angles .alpha. and .beta. were also controlled by varying the ratio of HBr to O.sub.2.
One problem associated with the HBr/O.sub.2 /He process is the formation of a polymer that builds up on the bottom 112. The polymer interferes with the etch process. To overcome this, one known trench forming method adds NF.sub.3 to the HBr/O.sub.2 /He chemistry to break up the polymer. Profile control in this method is still achieved by varying the ratio of HBr to O.sub.2.
Another known process for forming a trench uses a HBr/He/0.sub.2 etch chemistry in a first etch step followed by a second etch step that uses HBr with sulfur hexafluoride (SF.sub.6) and O.sub.2. The first step a etches an upper portion of the trench with a smaller, i.e., less vertical taper angle. The second step etches a lower portion of the trench with a more vertical angle of taper. Alternatively, the second etch step may include silicon tetrafluoride (SiF.sub.4) to increase hardmask selectivity as part of the etch chemistry. Both steps of this process are performed using high density plasma (HDP). In HDP the ion density is typically on the order of 10.sup.12 ions/cm.sup.3.
Although the above described techniques provide relatively high etch rates (e.g., 1-4 microns/minute depending on feature size) and effective profile control, they are relatively dirty processes, i.e., they produce a polymer that builds up on the inside walls and lid of the chamber. The polymer buildup leads to production of particles that can contaminate wafers and reduce wafer yield. Generally, the more O.sub.2 in the HBr/0.sub.2 /He chemistry the dirtier the process. The SiF.sub.4 used in the HBr/SF.sub.6 /O.sub.2 process tends to make the process dirty, i.e., they produce particles that contaminate the wafer and/or the process chamber. Consequently, the processing chamber must often be cleaned after processing each wafer. Although the chamber can be cleaned with a conventional plasma treatment, e.g., using NF.sub.3, the frequency of such cleaning reduces wafer throughput, increases cost per wafer and, consequently, reduces profitability.
One other known method of etching includes nitrogen trifluoride (NF.sub.3) along with Chlorine, HBr and He/O.sub.2 in a low-density, capacitively coupled plasma. This method has been used to etch transistor gates comprising tungsten silicide and polysilicon with an overlying hardmask of silicon oxide. NF.sub.3 is added to the etch recipe to improve etch selectivity. In this method trench profile is often controlled by varying the substrate temperature. The etch rates are relatively low (e.g., 2000-3000 .ANG./min).
Therefore, a need exists in the art for a cleaner, high-etch-rate method of controlling trench profiles during deep trench etching.